SD2SNES Update

Hi everyone, it was a long time since I not post something about the Ikari01/Maximilian Rehkopf SD2SNES project from which I build my own board from scratch!

As I suspected, soldering BGA is not something easy, and I went into lots of problem with this chip, from completely not working to as know working a bit, but not completely…In fact right know, I test as much as I can, and modify some part of the sd2snes test tools to check both address and data line of the memory chip, and despite all my tries, I have two data line that absolutely don’t want to work, they want to stay at ‘0’.. So since the chip have a 16bit RAM, and the SNES have a 8bit bus, I decide to, until I found a real hardware solution, to sacrifice half of the memory size by dupping each byte in both byte of the memory, and by ORing them when read. By doing this I halves the memory space, that’s a real waste, but it’s the only practical way to do..

I made changes on two of the FPGA version (lite & normal) to support this hack, I haven’t made change for now to the firmware, I can’t check right now on real hardware, but when using the debug CLI, loadrom, write and dump from memory seems to work seamlessly.

By the way, you can find the changes I push on github, I forked the Maximilian repository to push my own, and I even manage to have a merge pull request accepted! Thanks Maximilian!

You will found my repository here and maximilian’s one here

The SD2SNES is really a well made product, the source code, for both FPGA and the MCU are easy to understand, there are some design flow (or my I say, there is too much duplication between each version of FPGA bitfile, so a change in one version will not be dupped on the other, or the MCU source code can be sometimes hard to read due to cosmetics ;)) but the whole is a really nice made device.

Thanks again Maximilian for your hard work on the SD2SNES!

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