Category Archives: New Issue

Oric Schematic Issue 7

Yes, nearly 1 year after the release of the Issue 6.1, I finally made the Issue 7 that would fix the VSYNC problem the previous release had!

What’s new in the Issue 7:

  • There is now a 2 pin header to plug a reset button
  • The hardware VSYNC should now work correctly
  • One of the two ROM socket has been removed to reduce the schematic complexity, but it is now possible to use the original ROM, or any EPROM without the need to change anything on the PCB, because the /ROMDIS signal has been changed!
  • Better, it is now possible, and easily to use a 32K EPROM with the addition of a switch (there are pin on the PCB for this) to select the memory bank.

Continue reading Oric Schematic Issue 7

Oric Schematic – Issue 6.1

After looking on my project roadmap, I’ve discovered that I’ve never released the Replic’Oric schematics!

But first, please be warned, this revision is not the final one for the Replic’Oric project as the hardware VSYNC part is currently broken and shouldn’t be implemented the way it is now on this schematic.

A newer version of the Oric Schematic has been release, please use this version for reference instead of the one in this post.

Continue reading Oric Schematic – Issue 6.1